Ambipolar Deep-Subthreshold Printed-Carbon-Nanotube Transistors for Ultralow-Voltage and Ultralow-Power Electronics
Luis Portilla,1,2,# Jianwen Zhao2, * , Yan Wang,1 Liping Sun,3 Fengzhu Li,1 Malo Robin,2 Miaomiao Wei2, Zheng Cui2, Luigi G. Occhipinti,4,* Thomas D. Anthopoulos5,* and Vincenzo Pecunia1,#,*
1Jiangsu Key Laboratory for Carbon-Based Functional Materials & Devices, Institute of Functional Nano & Soft Materials (FUNSOM), Joint International Research; Laboratory of Carbon-Based Functional Materials and Devices, Soochow University, Suzhou, Jiangsu 215123, China
2Printable Electronics Research Centre, Suzhou Institute of Nanotech and Nano-bionics, Chinese Academy of Sciences, Suzhou, Jiangsu 215123, China
3iHuman institute, ShanghaiTech University, Shanghai 201210, China
4Department of Engineering, University of Cambridge, Cambridge CB3 0FA, United Kingdom
5King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi, Arabia
The development of ultralow-power and easy-to-fabricate electronics with potential for large-scale circuit integration (i.e., complementary or complementary-like) is an outstanding challenge for emerging off-the-grid applications, e.g., remote sensing, “place-and-forget”, and the Internet of Things. Herein we address this challenge through the development of ambipolar transistors relying on solution-processed polymer-sorted semiconducting carbon nanotube networks (sc-SWCNTNs) operating in the deep-subthreshold regime. Application of self-assembled monolayers at the active channel interface enables the fine-tuning of sc-SWCNTN transistors toward well-balanced ambipolar deep-subthreshold characteristics. The significance of these features is assessed by exploring the applicability of such transistors to complementary-like integrated circuits, with respect to which the impact of the subthreshold slope and flatband voltage on voltage and power requirements is studied experimentally and theoretically. As demonstrated with inverter and NAND gates, the ambipolar deep-subthreshold sc-SWCNTN approach enables digital circuits with complementary-like operation and characteristics including wide noise margins and ultralow operational voltages (≤0.5 V), while exhibiting record-low power consumption (≤1 pW/μm). Among thin-film transistor technologies with minimal material complexity, our approach achieves the lowest energy and power dissipation figures reported to date, which are compatible with and highly attractive for emerging off-the-grid applications.